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M62301SP/FP
10 to 12-bit 4-ch Integrating A/D Converter
REJ03D0861-0300 Rev.3.00 Mar 25, 2008
Description
M62301 semiconductor integrated circuit forms an integrating A/D converter, being connected to a microcomputer unit. By using selection signals and counter clock signals from the unit, a 10 to 12-bit A/D converter can be created at a low cost. The integration time and resolution can be set at the users option by changing external parameters. In addition, the built-in circuit offset, delay time and temperature fluctuation are adjustable, enabling a wide range of applications. M62301 has a 3 input decoder circuit, high-precision reference voltage (1.22 V) generator, current supply and comparator for integration, and voltage-monitoring reset circuit for a 5 V power supply. It is also equipped with girdling to prevent current leak from integration capacitor.
Features
* Separate power supplies for analog section and digital section. * Low power dissipation: 2 mA (Typ) (1 mA for A/D conversion and the other 1 mA for reset) * Linear error: 0.02% (Typ) * Conversion time: 526 s/ch (Typ) * Built-in system reset: 4.45 V (Typ)
Application
High-precision control systems such as temperature control and speed control
Block Diagram
Constant current control
12
Analog Analog Digital Digital VCC GND GND VDD
11 10 20 14
A1 19 A2 18 A3 17 A4 16 Reference 15 input
A1 A2 A3 A4 VREF GND Discharge Decoder
+ -
Logic control
0.49 V
+ - + - 0.36 V
5
INT
1 150 s + - Delay circuit 6
VCC for RESET RESET
Reference 13 voltage
VREF 1.22 V
7
8
9
2
3
4
Guard Integrating Guard C0 C1 C2 ring 1 capacitor ring 2
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 1 of 11
M62301SP/FP
Pin Arrangement
M62301SP/FP VCC for RESET C0 C1 C2 INT RESET Guard ring 1 Integrating capacitor Guard ring 2 Analog GND
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
Digital GND A1 A2 A3 A4 Reference input Digital VDD Reference voltage Constant current control Analog VCC
(Top view) Outline: PRDP0020BA-A (20P4B) PRSP0020DA-A (20P2N-A)
Absolute Maximum Ratings
(Ta = 25C, unless otherwise noted)
Item Analog section supply voltage Digital section supply voltage Digital input voltage Analog input voltage INT output current Reset output current INT output withstand voltage Reset output withstand voltage Reset supply voltage Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC VDD VID VIA IOINT IORE VINT VRESET VRE Pd K Topr Tstg Ratings 15 8 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 6 6 15 15 6 990 (P) / 660 (FP) 9.9 (P) / 6.6 (FP) -20 to +75 -40 to +125 Unit V V V V mA mA V V V mW mW/C C C
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 2 of 11
M62301SP/FP
Recommended Operating Conditions
(Ta = 25C, unless otherwise noted)
Item Analog section supply voltage Digital section supply voltage Analog input voltage range (Il = 50 A) Symbol VCC VDD VIA Min 4.5 4.5 0 Limits Typ 8.0 5.0 -- Max 12.0 5.5 No more than (VCC - 2.5 V) 1 and VDD* No more than (VCC - 2.5 V) 1 and VDD* 22000 60 4 Unit V V V
Reference input voltage (Il = 50 A)
VIR
1
--
V
Integration capacity Resistance to determine charge current Output current Note:
CI RI IO
300 6 --
-- -- --
pF k mA
1. Maximum analog input voltage is less than the difference between VCC - 2.5 V as well as VDD. VREF Charging current II = R1
Electrical Characteristics
(VCC = 5.0 V, VDD = 5.0 V, Ta = 25C, unless otherwise noted)
Item Supply current Analog input voltage range Reference input voltage Permissible current inflow at reference voltage A/D Converter Conversion error Linear error Conversion time Discharge time Analog input current Digital input "H" level Digital input "L" level INT output "L" level INT output leak current Detection voltage Hysteresis voltage Delay time Reset output "L" level Reset output leak current Supply current Limit operating voltage Reset Section Symbol ICC VIA VREF IREF+ IREF- EC EL TT Tdi IB VIH VIL VLINT IOHINT VDET VDET TDE VLRE IOHRE IRE VOPL Min -- 0 1.17 -- -- -- -- -- -- 3.5 -- -- -- 4.30 30 75 -- -- -- -- -- Limits Typ 1.0 -- 1.22 -- 0.05 0.02 526 3 -0.35 -- -- 0.1 -- 4.45 50 150 0.1 -- 1.0 0.75 0.6 Max 2.0 2.5 2.2 1.27 50 -10 0.1 0.09 -- 17 -3.5 -- 0.8 0.4 1 4.60 80 300 0.4 1 2.0 1.0 0.8 Unit mA V V A %/FSR %/FSR s s A V V V A V mV s V A mA V Rl = 24 k*1 Rl = 24 k*2 VIA = 2.5 V, Cl = 0.01 F Rl = 24 k V(8) = 3 V 0.3 V Cl = 4700 pF Test Conditions Il = 100 A Il = 200 A IREF = 5 A CREF = 4700 pF
IOL = 1 mA V(5) = 15 V
IOL = 1 mA V(6) = 15 V VRE = 5 V RL = 2.2 k, VLRE 0.4 V RL = 100 k, VLRE 0.4 V
Notes: 1. Conversion error; Deviation from the line that links the "0" scale point (mode 0) and reference scale point (mode 3. VFSR = 2.5 V). Associated with all channels. 2. Linear error; Deviation from the line that links the 0 V input point and 2.5 V input point on a given channel.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 3 of 11
M62301SP/FP
Operating Description
(1) Decoder Based on digital inputs to C0, C1, C2, the analog switch is set to on, and the input of "0" scale (GND input), input of reference scale (reference voltage input), input to A1-A4, or discharge from integration capacitor (CI) is performed. None of these operations is performed when the "mode 8" input is given:
Mode C0 C1 C2 1 0 0 0 Discharge 2 1 0 0 GND 3 0 1 0 VREF 4 1 1 0 A1 5 0 0 1 A2 6 1 0 1 A3 7 0 1 1 A4 8 1 1 1 --
(2) A/D conversion
Decoder selection mode 1 2 1 3 1 4 to 7 1
VIN + 0.49 V V (8) VREF + 0.49 V 0.49 V 0.36 V
TGND
TREF
TIN
Multiplexer first selects VGND, obtaining minimum pulse TGND. It then selects VREF, obtaining reference pulse TREF. Input is selected next, obtaining input pulse TIN. VIN is obtained by deducting TGND, as the offset, from TREF and TIN.
VIN = VREF * TIN - TG TREF - TG
By measuring voltage at the maximum input for approximately 500 s under the counter clock of 8 MHz, resolution of approximately 12 bits can be obtained;
500 s 125 ns 212
Note: To ensure discharge from capacitor CI, the decoder input as in the above diagram should stay in mode 1 at least for the period calculated above: Tdi = (CI x
VIAmax + 0.49 1 mA )
It is not necessary to measure TGND, and TREF for each channel.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 4 of 11
M62301SP/FP (3) Constant current control Integrating current II can be obtained based on the reference voltage (1.22 V) by the built-in high-precision generator and resistance RI.
II = 1.22 RI (A) .................... (1)
Integration time TI can be calculated as follows;
TI = (VIN + 0.49) CI II .................. (2)
However, parameters such as built-in comparator offset voltage, analog switch offset, voltage leak current and delay time are not counted.
II VREF
13 12 8
1.22 V
RI
CI
4.45 V
50 mA
Reset supply voltage VRE
0.8 V
t
RESET output
Output unsettled TDE TDE
t
When voltage applied to pin VRE becomes less than 4.45 V, the RESET output status becomes "L". If voltage increases over 4.50 V, the RESET status becomes "H" within 150 s.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 5 of 11
M62301SP/FP
Application Suggestion
1. 4-channel 11-bit A/D converter system
To microcomputer 5 V power supply 5V
10 k 10 k
1 2 20 19 18
To microcomputer control pin To counter To RESET
CINT 680 pF
3
4 5 6 7 8
17 16 15 14 13 12 11
Input analog voltage
M62301SP/FP
CREF
4700 pF
50 A CI 4700 pF
9 10
II = 50 A RI 24 k
Charge current II =
1.22 V 24 k
50 A
Note:
CREF: To stabilize reference voltage, be sure to connect capacitance of approximately 4700 pF. CINT: We suggest that this capacitance be connected to prevent malfunction due to noise. Use CI that leaks as slight current as possible. To prevent leak to the circuit board, we recommend providing guard ring (7), (9).
Resolution depends on the number of microcomputer counter clock pulses that are generated while the INT output status is "high" at the maximum input voltage 2.5 V (VCC - 2.5 V). When the microcomputer counter clock frequency is 8 MHz, the resolution can be calculated by using the constant calculated above, as follows;
4700 pF x (2.5 + 0.13) 50 A
1 8M
211
Therefore, the resolution of this system is approximately 11 bits.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 6 of 11
M62301SP/FP 2. 4-channel 12-bit A/D converter system Separate power supplies to analog section and digital section, analog input voltage range mode wider up to VDD, external reference voltage for integration.
To microcomputer 5 V power supply 8V
10 k 10 k
1 2 20 A1 19 A2 18
To microcomputer control pin To counter To RESET
CINT 680 pF
3
4 5 6 7 8
A3 17 A4 16 15 VDD 14 13 12 11
Input analog voltage
2.5 V
M62301SP/FP
CREF
4700 pF
To microcomputer 5 V power supply
50 A CI 6800 pF
9 10
II = 50 A RI 24 k
Note:
CREF: To stabilize reference voltage, be sure to connect capacitance of approximately 4700 pF. CINT: We suggest that this capacitance be connected to prevent malfunction due to noise. Use CI that leaks as slight current as possible. To prevent leak to the circuit board, we recommend providing guard ring (7), (9).
Because separate power supplies are provided for the analog are digital sections, the M62301 has two supply voltage VCC and VDD, enabling a wide analog input voltage range VIA. The upper limit of the range is required to be no more than the difference between VCC - 2.5 V as well as VDD, therefore, the analog input voltage range in this application is 0 V to 5 V. When the counter clock frequency is 8 MHz, resolution is;
6800 pF x 1 8M (5 + 0.13) 50 A
212
An A/D converter system with resolution of approximately 12 bits can be formed.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 7 of 11
M62301SP/FP Recommended operational settings according to clock frequency, resolution, and time required for discharge (decoder mode 1)
Counter Clock 8 MHz Resolution 10-bit 11-bit 12-bit 16 MHz 10-bit 11-bit 12-bit Change Current Il (A) 50 100 50 100 50 100 50 100 50 100 50 100
Tdi = ( CI x (VIAmax + 0.49) 1 mA
Resistance to Determine Constant Current Rl (k) 24 12 24 12 24 12 24 12 24 12 24 12
)
Integration Capacitance Cl 1400 pF 2800 pF 2800 pF 5600 pF 5600 pF 12000 pF 700 pF 1400 pF 1400 pF 2800 pF 2800 pF 5600 pF
Discharge Time Tdi (s) 7.7 15.4 15.4 30.7 30.7 65.9 3.9 7.7 7.7 15.4 15.4 30.7
Note:
1. Discharge time
The values in this table apply when VIAmax is 5 V.
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 8 of 11
M62301SP/FP
Typical Characteristics
Thermal Derating
1000 2.0
Analog Part Supply Current vs. Supply Voltage
Analog Supply Current ICC (mA)
Power Dissipation Pd (mW)
800
600
1.0
400
200
0 0 25 50 75 100 125
0 0 5 10
Ambient Temperature Ta (C)
Analog Supply Voltage VCC (V)
Standard Voltage vs. Ambient Temperature
1.24 0.05
Linear Error
Standard Voltage VREF (V)
Linear Error EL (%/FSR)
1.23
0.04
1.22
0.03 RI = 24 k 0.02 RI = 12 k
1.21
1.20
0.01
1.19 -20
0 0 20 40 60 80 0 1.0 2.0 2.5
Ambient Temperature Ta (C)
(OSR)
Analog Input Range VIA (V)
(FSR)
INT Output "L" Level vs. Output Current
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.01 0.1 1 10
INT Output vs. Ambient Temperature
INT Output "L" Level VLINT (mV)
INT Output "L" Level VLINT (V)
200
100
0 -20
0
20
40
60
80
INT Output Current IO INT (mA)
Ambient Temperature Ta (C)
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 9 of 11
M62301SP/FP
Reset Supply Current vs. Supply Voltage
2.0 4.7
Detection Voltage vs. Ambient Temperature
Detection Voltage VDET (V)
Reset Supply Current IRE (mA)
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 6 7 8 9 10
4.6
4.5
4.4
4.3
4.2 -20
0
20
40
60
80
Reset Voltage VCC VRE (V)
Ambient Temperature Ta (C)
Reset Output "L" Level vs. Output Current
1.0
Delay Time vs. Ambient Temperature
250
Reset Output "L" Level VREF (V)
0.9
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.01 0.1 1 10
Delay Time TDE (s)
0.8
200
150
100
50
0 -20
0
20
40
60
80
Reset Output Current IORE (mA)
Ambient Temperature Ta (C)
Limit Reset Voltage
2.0 1.8
Output Voltage VOUT (V)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.6 1.0 2.0 RL = 2.2 k RL = 100 k
Reset Voltage VCC VRE (V)
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 10 of 11
M62301SP/FP
Package Dimensions
JEITA Package Code P-SDIP20-6.3x19-1.78 RENESAS Code PRDP0020BA-A Previous Code 20P4B MASS[Typ.] 1.0g
20
11
1
10
c
*1
e1
E
*2 D
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
A
A2
Reference Dimension in Millimeters Symbol
e SEATING PLANE
*3 b 3
bp
e1 D E A A1 A2 bp b3 c e L
Min Nom Max 7.32 7.62 7.92 18.8 19.0 19.2 6.15 6.3 6.45 4.5 0.51 3.3 0.38 0.48 0.58 0.9 1.0 1.3 0.22 0.27 0.34 0 15 1.528 1.778 2.028 3.0
JEITA Package Code P-SOP20-5.3x12.6-1.27
L
RENESAS Code PRSP0020DA-A
Previous Code 20P2N-A
MASS[Typ.] 0.3g
20 11
HE
*1
E
A1
F
1 Index mark
10
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
c
*2 D
A2
A1
Reference Symbol
Dimension in Millimeters
*3 e bp y Detail F
D E A2 A1 A bp c HE e y L
Min Nom Max 12.5 12.6 12.7 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0 8 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8
A
REJ03D0861-0300 Rev.3.00 Mar 25, 2008 Page 11 of 11
L
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